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Feature request #289

open

Implement SyncW/AsyncR DP-SC in RAM module

Added by François Cerbelle almost 2 years ago. Updated almost 2 years ago.

Status:
Résolu
Priority:
Normal
Target version:
Start date:
01/02/2023
Due date:
01/05/2023 (about 24 months late)
% Done:

100%

Estimated time:
1:00 h
Spent time:

Related issues 1 (1 open0 closed)

Blocks Feature request #290: Implement FIFORésoluFrançois Cerbelle01/06/202301/10/2023

Actions
Actions #1

Updated by François Cerbelle almost 2 years ago

Actions #2

Updated by François Cerbelle almost 2 years ago

  • Estimated time set to 1:00 h
Actions #3

Updated by François Cerbelle almost 2 years ago

  • Tracker changed from Evolution to Feature request
Actions #4

Updated by François Cerbelle almost 2 years ago

  • % Done changed from 0 to 70
Actions #5

Updated by François Cerbelle almost 2 years ago

  • % Done changed from 70 to 80
Actions #6

Updated by François Cerbelle almost 2 years ago

  • Status changed from Nouveau to Résolu
  • % Done changed from 80 to 100
Actions #7

Updated by François Cerbelle almost 2 years ago

  • Due date set to 01/05/2023
Actions #8

Updated by François Cerbelle almost 2 years ago

  • Subject changed from Implement dual-port/Dual-clock in RAM module for FIFO to Implement synchronous DP-DC in RAM module for FIFO
Actions #9

Updated by François Cerbelle almost 2 years ago

Convert the Synchronous SP/SC RAM module in a true Synchronous DP/DC RAM module, write testbench, write documentation

Actions #10

Updated by François Cerbelle almost 2 years ago

  • Subject changed from Implement synchronous DP-DC in RAM module for FIFO to Implement synchronous DP-SC in RAM module
  • Status changed from Résolu to En cours
  • % Done changed from 100 to 90
Actions #11

Updated by François Cerbelle almost 2 years ago

  • Status changed from En cours to Résolu
  • % Done changed from 90 to 100
Actions #12

Updated by François Cerbelle almost 2 years ago

  • Subject changed from Implement synchronous DP-SC in RAM module to Implement SyncW/AsyncR DP-SC in RAM module
Actions #13

Updated by François Cerbelle almost 2 years ago

  • Status changed from Résolu to Fermé
Actions #14

Updated by François Cerbelle almost 2 years ago

  • Status changed from Fermé to Résolu
Actions

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