Version Française sur mon blog: https://fcerbell.github.io

This project includes :
- The hardware design and build (Kicad)
- The firmware source and binaries (Arduino IDE)
- The 3D printed enclosure design source (FreeCAD)

I needed a small electronic load, I wanted to have one. Even the smallest are way too expensive for my usage and miss a lot of wished features. Thus, I specified high ratings and numerous features, way over my needs, even if I meet 50% of the specs, this will be more than my actual need....

Source Jekyll de mon blog
Jekyll sources for my blog

Hakeva (pronounce hae-key-va) means Hardware Key Value
(aka Hardware Redis, or hwredis)
...and also "rare" in Finnish

Be aware that this project will probably never reach a useful status. It helps me to learn FPGA configuration with Verilog
Designing and building such and electronic hardware, a firmware and a gateware is my new personal challenge....

First implemented in 1997, after reading the amazing book from Steve Maguire,
"L'art du code" (French translated title), by Microsoft Press.

Non intrusive, provides enhanced assertions, checkpoints and a transparent
memoryleak tracker.

Way faster than valgind, it can be compiled and used by end-users to provide a...

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Library to generate and simulate OOM conditions for unit testing.

It can be compiled static or dynamic. It includes a /pkg-config/ description file. It can be installed system-wide on build machines.

In the generate mode, it relies on POSIX rlimit features. It can set an hardlimit on the current process and its childrens to avoid eating the whole system RAM. It has protections to avoid including swap memory in the specified limit to avoid consuming swap. Then, it has an enable/disable function pair to temporarily lower the soft rlimit in order to adjust for specific tests and machines. Finally, it has a fill/free function pair to quickly consume/free the whole RAM, keeping only the specified Heap/Stack available bytes. These last functions are designed to be placed IMMEDIATELY before and after the test execution, but the test result check should occurs OUTSIDE of this pair, a test condition, a printf, coverage instrumentation, ... would probably fail if called between these two guys....

Multiplatform-Distributed application framework
Micro-kernel based, everything as a module

Features¶

• Integrated memory leak detection for testing
• Advanced OOM behavior tests (using setrlimit and filling RAM) for testing
• Module manager with modules meta-data, onload/onunload auto calls and usage counter...

My packer configuration to build vagrant boxes

My puppet modules, mainly tested on and developped for Debian

Hardware :
The idea is to create a mini cluster with 15 raspberry pi connected to a single 16 port switch and to a single 5V power supply. It has to be as light as possible and transportable. Each node need to be switchable (on/off) easily and to have a minimal UI (LEDs connected to GPIO pins)....

Read through cache based on Redis

GET "SELECT firstname,lastname,age FROM customer" 

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Redis Enterprise Software Statistic collector

This tool takes a list of clusters to query using their REST API and a list of report to generate in a CSV file.

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My vagrant configuration to instanciate immediate clusters

Meta-project with subprojects
Verilog playground for FPGA (Altera/Intel Cyclone family)
- SDRAM
- FIFO
- UART
- ...