- Demo VM
A compact virtual machine embedding all the infrastructure softwares installed and configured (Apache, Tomcat and Mod_Jakarta, OpenSSL and mod_SSL, Java, PHP, MySQL and PhpMyAdmin, PostgreSQL and PhpPgAdmin, MongoDB and RockMongo, OpenLDAP and PhpLdapAdmin, CAS, ...), and applications using this infrastructure, to help demonstrating integrations, reproducing test cases or customer issues, making proofs of concepts, grabbing screenshots or snippets, ......
Domoticz ([[http://www.domoticz.com]]) home-automation system for Android, with Pebble-watch ([[http://www.getpebble.com]]) support.
Version Française sur mon blog: https://fcerbell.github.io
This project includes :
- The hardware design and build (Kicad)
- The firmware source and binaries (Arduino IDE)
- The 3D printed enclosure design source (FreeCAD)
I needed a small electronic load, I wanted to have one. Even the smallest are way too expensive for my usage and miss a lot of wished features. Thus, I specified high ratings and numerous features, way over my needs, even if I meet 50% of the specs, this will be more than my actual need....
Source Jekyll de mon blog
Jekyll sources for my blog
Hakeva (pronounce hae-key-va) means Hardware Key Value
(aka Hardware Redis, or hwredis)
...and also "rare" in Finnish
Until I fix Redmine/Hg integration, the repository is available at https://hg.cerbelle.net/hg/hwredis/
*Be aware that this project will probably never reach a useful status. It helps me to learn FPGA configuration with Verilog...
Multiplatform-Distributed application framework
Micro-kernel based, everything as a module
(Pluggable | Power) (Administration | Application) (Client | Console)
My packer configuration to build vagrant boxes
- Puppet Modules
My puppet modules, mainly tested on and developped for Debian
- Raspberry Pi Cluster
The idea is to create a mini cluster with 15 raspberry pi connected to a single 16 port switch and to a single 5V power supply. It has to be as light as possible and transportable. Each node need to be switchable (on/off) easily and to have a minimal UI (LEDs connected to GPIO pins)....
My vagrant configuration to instanciate immediate clusters
Meta-project with subprojects
Verilog playground for FPGA (Altera/Intel Cyclone family)
Dual channel, single clock FIFO¶
With data_width and addr_width parameters.Mostly inspired by :
Can be used to implement any kind of simple buffer
The buffer infers to M9K memory cells in Quartus2/CycloneIV
Simple UART (serial) implementation
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