Feature request #290
Updated by François Cerbelle over 1 year ago
Implement dual-port, dual-clock-synchronous FIFO based on the DP-DC BRAM. Testbench Documentation Embedding BRAM
Updated by François Cerbelle over 1 year ago
Implement dual-port, dual-clock-synchronous FIFO based on the DP-DC BRAM. Testbench Documentation Embedding BRAM