Backplane/Motherbord¶

The size has respect an ATX standard to fit in standard racks. Micro-ATX

https://web.archive.org/web/20120725150314/http://www.formfactors.org/developer/specs/atx2_2.pdf

Connectors¶

ATX Power
JTAG
I2C
UART
FTDI/USB to UART
Connection BUS (2 microcontrolers, 1 UPS, 2 PSU, 5 RAM or FPGA)
Front panel (Power, Alert and Reset buttons, Power, Alert, Heartbeat1, Heartbeat2, LEDs)
2x 3pins PWM Global FAN connectors

Connection bus¶

Power : -12V, -5V, GND, +3.3V, +5V, +12V

JTAG : TDI, TDO, TCK, TMS, TRST

I²C : SDA, SCL

RAM bus : Addr lines, Data lines, BankSelect?, WE, OE, CLK?

It has connectors to support module hotplug :

Memory modules with standard DDR2 (DDR3/4/5 if possible)
Storage modules with up-to 4 x Standard 2.5' HDD/SSD for persistence and RAID 0, 1, 10, 5 support
PSU modules (up-to two of them) for HA
UPS to drain the data in case of power failure and to keep the RAM refreshed to avoid dataloss
Redis Core (FPGA) modules

BMC/IPMI/Redfish¶

It has to embed an onboard BMC/IPMI for easy management with its own dedicated NIC.
Maybe OpenBMC (https://github.com/openbmc) running on a Raspberry Compute Module 3+ (https://www.raspberrypi.com/products/compute-module-3-plus/) in a SO-DIMM form factor, with a dedicated ENC28J60 NIC (https://www.raspberrypi.com/documentation/computers/compute-module.html).

Power control and Reset¶

A Reset+Brown-out+Watchdog dedicated circuit
A clean reset momentary push button with NE555 debounce.
A momentary push power button (short press soft-toggles power, long press to hard power-off)

I2C BUS¶

RTC¶

with battery (or super-capa), updated by the microcontrolers, from the network, with NTP

PWM FAN controlers¶

FPGA node¶

FPGA node hardware design

Microcontroler nodes¶

It has 1 (or 2 for HA) hotpluggable microcontroler module. Each of them has his own dedicated NIC, as an 100M/1G/10G SFP+ module. It has to support backup and restore processes. With ATSHA, EEPROM, Flash, Clock, I2C BUS, I2C temp sensor